Well, fastram slowram/chipram was a compromise. To make the custom chips cheaper, they had fewer address lines than the CPU (68000 had 24), 19 lines on the OCS and 20 on ECS and 21 on AGA (512Kb, 1Mb, 2Mb). The custom chips had to get their data from somewhere so they got it from the lower bank of RAM. Of course if you ONLY had that low bank of RAM the CPU would have to use it too, so hence it was 'slow' because of the sharing. There were some cool things you could do to make either the CPU or the custom hardware get priority and run faster...BLTCON0 Blitter Nasty anyone?
Not a design mistake at all, but part of a deliberate, clever, cheap architecture. The Sinclair ZX Spectrum did something similar, the lower 16Kb of 48Kb being contended. Now RAM is cheap we have 1Gb dedicated to only the video board. That kind of architecture was a possible, but an impossibly expensive dream back then.
The guy's not using a 68000 CPU (are they even still available?!), he's using an FPGA. What that means is that he's made a design, probably in a package called Altera, which sits in a ROM and is programmed into the FPGA at boot time, that has the 68000 instruction set and is being clocked so it looks like it's running at 7.14MHz. The FPGA probably runs at 200MHz or so.
To get a good Amiga emulation, you need to get the cycle interlocks right, ie. 7.14Mhz = 7140000 ticks per second = 142800 ticks per frame, around 35700 4cycle move instructions, and the custom hardware has to tick along with that (I think it was 1 tick every 4cpu ticks, hence the 4pixel horizontal res on OCS Copper). To upgrade to a faster CPU is first updating the 680x0 instruction set (some had FPU, some had MMU - remember the 68881?) and also updating the chipset to interlock. Not simple, but again, probably possible on the same FPGA
Jim
